An Embedded Boundary Scan Test System
نویسندگان
چکیده
This paper describes an application of boundary scan IEEE Std. 1149.1 at system level. It provides the description of the design and the implementation options of a VME boundary scan controller board prototype and the corresponding software. The prototype was designed to use the Module Test and Maintenance (MTM) bus, existing in the VME 64x backplane, to apply the IEEE 1149.1 test vectors to a single board with a specific test infrastructure also described in this contribution. The software takes the boundary scan test/programming vectors generated by an automatic test pattern generator (ATPG) in serial vector format (SVF), and converts them into a format suitable to be used in the considered test infrastructure.
منابع مشابه
Application Note 1022 Boundary-Scan, Silicon and Software Enable System Level Embedded Test
Designing IC’s, boards, and systems with a DFT strategy that utilizes boundary-scan, will make a quantum improvement in test development cycle-time, and fault coverage both in production and in the field. Tools are commercially available that automate design, test development, and ultimately embedded test for IEEE 1149.1 compatible systems. This paper is intended to familiarize designers and te...
متن کاملEmbedded Boundary-scan Testing
Boundary-Scan testing is used more and more to overcome many of the testability issues facing today’s higher density designs. In the past, Boundary-Scan has been used successfully with ATE’s and external PC based test systems. Since Boundary-Scan tests are structural in nature, they can be reused with often minor modifications in the embedded arena. Further, these same tests can be used in the ...
متن کاملForensic imaging of embedded systems using JTAG (boundary-scan)
This paper describes how to use JTAG (JTAG: Joint Test Action Group, also called boundary-scan) for producing a forensic image (image: an one-on-one copy of data found on an exhibit) of an embedded system. A JTAG test access port is normally used for testing printed circuit boards or for debugging embedded software. The method described in this paper uses a JTAG test access port to access memor...
متن کاملBoard Level IEEE 1149 . 1 Boundary Scan Built In Self Test
IEEE1149.1 Boundary Scan has become an important test technique within complex IC's and boards in today's electronic assemblies, providing a low cost, high fault coverage test methodology for digital designs. The most common approach is for the IEEE1149.1 test to be performed in factory with test vectors being supplied by external test equipment, however new IEEE1149.1 test support devices are ...
متن کاملSCANPSC100F Embedded Boundary Scan Controller (IEEE 1149.1 Support)
The SCANPSC100F is designed to interface a generic parallel processor bus to a serial scan test bus. It is useful in improving scan throughput when applying serial vectors to system test circuitry and reduces the software overhead that is associated with applying serial patterns with a parallel processor. The SCANPSC100F operates by serializing data from the parallel bus for shifting through th...
متن کامل